Modern integrated circuits are made up of literally millions of active devices such as transistors and capacitors. These devices are initially isolated from each other, but are later interconnected together to form functional circuits. Typical interconnect structures include lateral interconnections, such as metal lines (wirings), and vertical interconnections, such as vias and contacts. Interconnections are increasingly determining the limits of performance and the density of modern integrated circuits. On top of the interconnect structures, bond pads are formed and exposed on the surface of the respective chip. Electrical connections are made through bond pads to connect the chip to a package substrate or another die. Bond pads can be used for wire bonding or flip-chip bonding. Wafer level chip scale packaging (WLCSP) is currently widely used for its low cost and relatively simple processes. In a typical WLCSP, interconnect structures are formed on metallization layers, followed by the formation of under-bump metallurgy (UBM), and the mounting of solder bumps.
In a typical bump formation process, an under bump metallurgy (UBM) is formed, followed by the formation of a bump on the UBM. The UBM formation may include forming a copper seed layer, and forming and patterning a mask on the copper seed layer so that a portion of the copper seed layer is exposed through an opening in the mask. A plating step is then performed to plate a thick copper layer on the exposed portion of the copper seed layer. In the forming and patterning of the mask, residues (known as a scum) of the mask may be undesirably left or be generated as a by-product of the patterning step. A descum step is then performed to remove the scum before the copper plating. Traditional process utilizes a strong CF4/O2/N2 descum process to remove the scum and oxidation, but the descum process causes residual fluorine ions on the wafer, which enhance the speed of UBM oxidation in ambient environment and also diffuse out and contaminate other surrounding wafers.
Moreover, it is observed that the queue time (Q-time) after the descum step is very short, sometime shorter than 12 hours, wherein the Q-time is the time that the respective wafer can be stored without incurring significant degradation before the copper plating. However, four process steps may be needed before the copper plating, and these process steps may take a long period of time. Serious UBM oxidation was found after descum process even though it was still within Q-time. If the Q-time expires while the copper plating has not been performed, the respective wafer has to be re-descumed to re-clean the surface of the wafer. However, the re-descum would damage the profile and the dimension of the mask, and damage the shape and the dimension of the resulting via on the metal surface as well, and hence cause the difficulties in controlling the bump height and bump strength. These challenges contribute significantly to high manufacturing cost and poor bump reliability.